Starting from customer specification or high level model, we deliver a synthesizable and validated RTL code. We provide support for the integration in customer project
To learn more on the design service activity, please click here.
Our IP is generic from 12 to 16 bits ADC and fully digital build of an estimator and correction engin. It has been validated on FPGA and can be targeted to any customer technoly.
We have several years experience in IBIS AMI modeling using SystemVue Keysight tool. We can help customers setting up the generation and correlation flow based on fitting technics of analog netlist stimuli with filter response
To learn more on our IBIS AMI modeling service, please click here.
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